A logic analyzer is a test and measurement instrument that acquires data samples from a system under test (also known as a target system or simply a target) over a large number of channels. Logic analyzers typically store a timestamp with each acquisition sample that records the precise time at which that sample was acquired, relative to the beginning of the acquisition process. In typical logic analysis systems, such as the TLA family of Logic Analyzers, manufactured by Tektronix, Inc. of Beaverton, Oreg., the acquisition start signal and timestamp clock are distributed to all acquisition units in the system so that all units act in concert. Thus, when an acquisition is complete, it is possible to sort and display samples from all of the units in an ordered sequence based on the timestamp values stored with each sample. This process is known as Time Correlation.
However, in some instances, it is necessary to use multiple, independent, acquisition systems to acquire data simultaneously. Independent, in this case, means that the acquisition systems do not share both a common start signal and common timestamp clock. As such, the mechanism described above cannot be applied. Nevertheless, it is desirable to be able to present the data acquired by these independent systems in a time-correlated display.
One example of a pair of independent systems that suffer from this problem consists of a logic analyzer in concert with a Xilinx ILA (Integrated Logic Analyzer), manufactured by Xilinx, Inc. of San Jose, Calif. The Xilinx ILA gives users of Xilinx FPGAs (Field Programmable Gate Arrays) the ability to acquire data from internal FPGA nodes and to save that data in memory in the FPGA for later retrieval and display. The user defines a custom ILA for his/her specific application, specifying which nodes to acquire, which nodes to use for triggering, and clocking, and the acquisition buffer depth. The ILA definition is merged with the user's own FPGA source code, and is then programmed into the target component. The logic analyzer gives users visibility of logic signals external to the FPGA while the ILA provides visibility of FPGA internal nodes. It would be desirable for users to be able to view both sets of data in a time-correlated presentation such that relationships between internal and external activity could be analyzed. Yet, these two systems, the ILA and logic analyzer, use independent acquisition clocks and do not share a common start signal. Furthermore, the ILA does not save timestamp information with its samples at all.
Agilent Technologies, Inc. of Palo Alto, Calif., has developed an approach and a tool for time correlation, which enables data acquired by their 16700 series logic analyzer to be time correlated with data from a Xilinx ILA under limited circumstances. In this prior art solution, the ILA trigger signal is routed to one of the FPGA external pins, such that it can be acquired by the logic analyzer along with other external data. A transition on this signal provides a single reference point in the 16700 acquisition corresponding to a known sample in the ILA acquisition. In this prior art solution, the user must specify the period of the clock that is being used to acquire the ILA data It is then possible to calculate effective timestamps for the remaining ILA samples, relative to the known timestamp at the trigger point. This solution is explained in detail in an Agilent product note entitled, Using the Agilent Technologies 16700 Series Logic Analysis System with the Xilinx ChipScope ILA, published in November 2000.
This prior art approach enables the Agilent 16700 to effectively time correlate the data from the ILA with its own acquisition data, but is limited to systems in which the ILA acquisition clock has a regular, fixed and known period. It will not function properly if the acquisition clock is irregular or is qualified (temporarily inhibited) by other system logic. This solution also suffers from drift between the Agilent 16700 timestamp clock and the clock being used for ILA acquisition. The cumulative effect of this drift decreases the accuracy of derived timestamps for the ILA samples as the time interval between the known reference point and any given sample increases. What is needed is a solution that provides time correlation between two independent acquisition systems without requiring the use of a common timestamp clock nor an acquisition clock with a known, fixed, period.